Weaver
Weaver is a LPDDR5X memory fanout gearbox chiplet providing a scalable, high-bandwidth memory connectivity solution. It is designed to eliminate bottlenecks in AI and data center workloads. Leveraging Credo’s advanced 112G very short reach (VSR) SerDes and proprietary architecture, Weaver delivers industry leading beachfront I/O density, high memory capacity with flexible DRAM packaging, and seamless migration to future memory protocols.
Weaver incorporates 112G VSR SerDes, a lightweight framer, and robust telemetry for reliability and uptime. It enables late binding of DRAM for XPU vendors and is comprised of a chiplet-ready design.
About this product
Rate
112G
Number of Lanes
12
Memory Interface
LPDDR5X
Form Factor
Chiplet
Reach
250mm
I/O Power
1.15 pJ/bit
Round Trip Latency
40ns
Memory Bandwidth
Up to 16TB/s
Memory Density
Up to 6.4TB
Operating Temperature
0 to 85°C
- Scalable bandwidth and beachfront density
- Flexible DRAM packaging and late binding
- Integrated telemetry and diagnostics
- Seamless migration to future memory protocols
- Chiplet-ready for custom silicon integration
- Lightweight Framer/FEC follows PCIe6 FLIT
- Credit-based flow control
- FEC/CRC from PCIe6 FLIT
- 40ns RTT latency
- Full control over LPDDR5X PHYs (page status/refresh/etc.)
- Low-power dissipation