In 2023 Credo is participating in numerous events hosted by the Taiwan Semiconductor Manufacturing Company (TSMC), including the most recent TSMC Technology Symposiums in San Jose, Austin, Israel, and Shanghai. Attending these Tech Symposiums gives our team new insight into developing in new process technologies, including the latest in 2nm and 3nm processes. Working closely with an undisputed leader like TSMC as an OIP ecosystem partner is what allows Credo to continue to deliver groundbreaking advancements in high-performance connectivity with the most competitive energy efficiency.
“As a part of the TSMC ecosystem, Credo will enable other companies developing complex SoCs to take advantage of our unique high-performance, low-power architectures to develop solutions for next-generation switching, artificial intelligence (AI), machine learning (ML) and high-performance computing applications,” explains Joe Sheredy, Vice President of Systems Engineering at Credo. “These types of collaborative efforts empower innovation throughout the supply chain and shorten design time, time-to-volume, time-to-market, and ultimately, time-to-revenue.”
For the past eight years, Credo has been attending the Technology Symposium events where the TSMC ecosystem transforms ideas into world-changing solutions. This year, Credo is taking part in five Technology Symposiums, to showcase the following technologies:
Nighthawk 112G LR SerDes IP– This DSP based SerDes IP provides ASIC connectivity up to 112G per lane for LR+ channels to enable next generation data center switches, AI, and ML applications to move forward faster.
Nutcracker 3.2 Tbps Retimer Chiplet – Enables high-speed connectivity with 112Gbps lane rates. It’s optimized for low power and system reach performance in next-generation multi-chip-modules (MCM) for advanced switching, compute, artificial intelligence, machine learning, and CPO applications.
All Credo offerings showcased at TSMC events are based upon our unique SerDes architecture that offers customers low-cost, energy efficient solutions. Manufactured in mature process nodes, the SerDes solutions are available in chiplet form for integration with SoCs, overcoming the process limitations typically associated with advanced ASICs. This allows our customers to benefit from field hardened SerDes IP and chiplets to get their own next-generation solutions to market sooner.
Later this year, Credo will also participate in TSMC’s Open Innovation Platform (OIP) Ecosystem Forum, a series of unique technical conferences that brings together TSMC’s design ecosystem partners and customers to share practical solutions that address current design challenges. OIP promotes the speedy implementation of innovation amongst the semiconductor design community and its ecosystem partners using TSMC's IP, design implementation and design for manufacturability (DFM) capabilities, process technology and backend services.
Through our active participation in TSMC's Technology Symposium and OIP Ecosystem Forum, Credo continues to deliver groundbreaking advancements that push the boundaries of connectivity solutions. These events not only provide a platform to showcase our technologies but also allow us to influence industry standards, while addressing customers’ pursuit of energy efficiency in the data infrastructure industry. To learn more about Credo's IP and chiplet products, visit us at the next TSMC event or find out more here